Kapik is developing IP blocks within Smart Analog and Power Management areas. The following is a listing of IPs currently under development:
Medium resolution, Low power ADCs:
Kapik is currently developing a variety of dataconverters between 8 to 12-bits for sampling rates up to 200MS/s. Our ADCs use novel low power techniques to enable substantially lower power than the competition. Our flexible and reconfigurable ADC architectures can be used in applications such as: mobile systems, CCD imaging, ultrasonic medical imaging, digital receivers, base stations, digital video (e.g. HDTV), xDSL, cable modems, and fast Ethernet. [request datasheet]
High bandwidth, 6-bit ADC:
We use a 'smart analog' approach to deliver a high bandwidth (>1GS/s) very low power ADC architecture. Our modular design and digital calibration engine allows for even higher speeds to be achieved as per customer requirements. [request datasheet]
Very low power ADCs for mobile applications
12 to 16-bit ADCs are under development targetted for low power low bandwidth applications. Low power is achieved using a digitally enhanced delta-sigma based approach. Applications include: medical implants, audio, and sensors. [request datasheet]
High efficiency Buck converter:
A high overall efficiency (93%) switching DC/DC Buck converter, provides 1.8V (300mA) and 1V (350mA) regulated supply voltages. The converter uses a low ESR off-chip inductor and a low ESR off-chip capacitor to facilitate the voltage regulation. The converter is designed in a 1.8V 0.18um CMOS process with thick oxide 3.3V tolerant devices. A spread spectrum controller spreads the switching noise over a wide range of frequencies, so as to avoid concentrating noise at a single tone, making it useful for high linearity based mixed signal systems. [request datasheet]
Dual supply Buck converter:
A high overall efficiency (>90%) switching DC/DC Buck converter, provides two programmable output voltages between +/-0.9 and +/-1.8V, with current handling up to 500mA. A proprietary technique is used to generate both positive and negative voltages, where each can be programmed separately, while only requiring one off-chip inductor. The converter uses a low ESR off-chip inductor and a low ESR off-chip capacitor to facilitate the voltage regulation. The converter is designed in a 1.8V 0.18um CMOS process with thick oxide 3.3V tolerant devices. A spread spectrum controller spreads the switching noise over a wide range of frequencies, so as to avoid concentrating noise at a single tone, making it useful for high linearity based mixed signal systems. [request datasheet]